1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device and, more particularly, to a semiconductor integrated circuit device which has a nonvolatile memory section having an automatic execution function for a data rewrite and a simultaneous execution function for a data read during automatic execution, and a read start trigger signal generating method for the device.
2. Description of the Related Art
An EEPROM capable of electrically rewriting data normally has an automatic execution function for a data rewrite. This automatic execution requires several μs to several ms, although a normal read is performed in several ten ns. For this reason, once automatic execution is started, a wait time is required until the next data read.
To improve this disadvantage, some EEPROMs have a simultaneous execution function. The entire memory cell region is partitioned into a plurality of banks. Even while a given bank is under automatic execution, the remaining banks can normally be read-accessed. With this simultaneous execution function, when an input read address matches the bank address under automatic execution, a hardware sequence flag is read out. If the addresses do not match, cell data is read out from a memory cell.
When a signal RDBYB changes from “0” to “1”, the user is notified of the end of automatic operation of the EEPROM. If the address of the read-access destination matches the address of the bank that is being automatically executed, switching from the hardware sequence flag to the cell data is executed after the signal RDBYB has changed from “0” to “1”.
In this way, if the address of the read-access destination matches the address of the bank that is being automatically executed, switching from the hardware sequence flag to the cell data is executed after the signal RDBYB has changed from “0” to “1”.